Processor Whispers: About coring and distancing
by Andreas Stiller
Hot chips and hot decisions have hailed from Palo Alto in California: the press release from HP about disengaging its PC business and revelations by the developers at the Hot Chips conference.
German renovator at work: just as "Mr Turnaround" Eckard Pfeiffer once pulled Compaq out of the loss zone and turned it into the largest PC manufacturer with a two-fisted renovation program – acquiring both Tandem and Digital Equipment – twenty years later, Léo Apotheker intends to realign Hewlett-Packard, the company that bought Compaq, for the challenges of the future.
Better leave a possibly sinking PC ship and sink the capital into business software instead – that's probably how one has to interpret the decision of the HP boss, who is looking to buy the English-American software company Autonomy for the steep price of £7 billion in order to strengthen HP's software-wise position against IBM, Oracle and others.
Conventional databases and dumb search engines are outdated and Autonomy provides modern software for search and knowledge management that can handle unstructured requests and thousands of different file formats for text, audio and video.
But who will want to buy HP's Personal Systems Group? Samsung, Acer, EMC², Google, Abu Dhabi? Michael Dell, at least, makes fun of HP's decision on Twitter: "HP.... They are calling it a separation but it feels like a divorce", "...maybe they will call it Compaq?" and other, similar comments.
But the time when PC manufacturers were the driving force of PC technology is long gone, anyway – today, they mostly have Chinese partners assemble their machines from building blocks – and now processor firms like Intel and AMD, in league with software companies like Microsoft, have taken over. And to ensure it stays that way, Intel and Microsoft will coincidentally hold their big developers' conferences IDF and BUILD at the same time this September. Prior to that, they will be having a joint Rütli day to swear fealty to x86 on some hill in San Francisco – for a while, it had indeed appeared as though Windows 8 had only been designed for ARM.
At the Hot Chips conference at the famous Stanford University, a mere three miles from HP's headquarters in Hanover Street in Palo Alto, ARM dinosaur Simon Segars had the privilege of giving the keynote speech. Boldly, he foretold that the superphones will make notebooks and netbooks obsolete in no more than two years: golden times for ARM – if Intel doesn't manage to gain a foothold here. On the following day, speculations ran wild again: at the bargain price of £10 billion, Intel could just buy the lively competitor. However, the analysts on Wall Street know that not only the European Commission, the EU's antitrust authority, but also the comparatively tolerant American Federal Trade Commission (FTC) would strongly object to such a deal.
At the same conference, AMD presented the eagerly awaited Bulldozer chip in more detail, in all of its eleven metal layers. It was disclosed that the chip, with its eight cores housed in four modules, measures a total of 315 mm² and that the "contacted gate pitch" – the distance between the outer transistor connectors – for the lower three metal layers is only 104 nm. For comparison: Intel's Sandy Bridge packs four cores plus GPU on 216 mm², manages with two fewer layers in the current 32 nm process (P1268), but the critical layers have a slightly larger pitch of 112.5 nm. And so it's not surprising that Intel's chips require slightly more space per transistor.
The possibly more important question of when the Bulldozer will roll out, remained unanswered though, at least officially. It appears that, in spite of a certain humorous video clip, the Bulldozer won't be around before mid-October – maybe in its C0 stepping.
Intel was conspicuously tight-lipped concerning the next processor generation: no news regarding the Sandy Bridge E/EP or the successor Ivy Bridge. The audience only got a more detailed insight into the power management and the turbo boost 2.0 of the current generation. However, Intel did shed some more light on the Itanium processor Poulson, planned for 2012. With eight cores and 3.1 billion transistors it will have fewer transistors per core than the current Itanium, Tukwila. Thanks to the Instruction Replay Technology (IRT), Poulson can cancel and re-execute commands when an error occurs. It also supports "Dual Domain Multithreading" where the frontend (fetch commands and decode them) and backend (execute and write back results) can thread independently from each other. That doesn't sound too bad and maybe the chip is so good that HP is going to restructure its business model because of it. At least, the Autonomy software also supports HP-UX-Itanium.
Slimmer but Higher
Oracle intends to enter the game, too. But instead of further software for the Itanium, it's counting on SPARC hardware. To this end, the former Sun developers had to significantly "core down" the Niagara 3 processors in order to better attune them to the needs of the Oracle software. While elsewhere the motto continues to be "more cores", Oracle is now moving in the opposite direction, as announced by Larry Ellison about nine months ago: the T4 (Yosemite Falls), expected at the end of 2011, will only have 8 instead of 16 cores, but they will be more powerful with almost double the clock speed, local L2 caches, out-of-order execution and 2-issue superscalar. So at least the single-thread performance of the upcoming waterfalls will "explode". As proof, Oracle cites comparative results from the SPEC-CPU2006 benchmark, which show a factor five and factor seven performance increase, for the integer and floating-point suite respectively, in comparison to the predecessor T3. However, a possible auto-parallelisation of the compiler might have strongly distorted the results.
Strangely enough, Oracle hasn't provided any SPECrate values for multiple threads up until now, only those have been regarded as important and published by Oracle/Sun/Fujitsu. In any case, in the TPC-C transaction benchmark, the new eight-core chip only has a very slight advantage over the old T3 with 16 cores. Which means that, for the chip to be recommendable, it will have to be significantly more power efficient than its predecessor.