Processor Whispers: About Urbis et Orbis
by Andreas Stiller
AMD taps into new, promising business areas in the embedded sector and Intel in wafer marketing. Additionally, Intel invents new, dubious power specifications and releases information about Ivy Bridge EP, under the name Next Generation Xeon.
At the analysts' conference at the end of 2012, Rory Read had already made clear that, in the future, he sees AMD becoming more heavily involved in the embedded sector, which he plans to quickly expand from 5 to 25 per cent of sales. So-called semi-custom APUs, chips that are tailored to the contractors' wishes are supposed to help AMD gain new market share. And yes, AMD does need more turnover, $1.16 billion in the last quarter represent a 32 per cent drop compared to the year-ago quarter, coupled with a loss of $473 million. A comparison: IT giant IBM announced a record quarter with $5.83 billion of profit, enough to buy up AMD three times.
But there are rays of hope: The next generations of the big video game consoles, Sony Playstation 4 "Orbis" and Microsoft Xbox 720 "Durango", are ideally suited to be equipped with the mentioned semi-custom APUs. For both of them, the energy-efficient Jaguar, presented at Hotchips 2012, is now considered as the first choice. Reportedly, AMD's internal project names for the chip's special console implementation are Thebes for the PS4 Orbis and Kryptos for the Xbox Durango. As for the PS4, the majority of sources claim that the initial plan to use the successor of the current Bulldozer/Piledriver processor, called Steamroller, is off the table now, although Steamroller would have delivered a bit more performance – but also more heat.
Processor manufacturer IBM and graphics chip company NVIDIA appear to have fallen out of favour with the big console manufacturers. This forced NVIDIA to introduce its own games console Shield as a defensive action. In how far Ex-AMD employees have supplied NVIDIA with internal AMD data about the above and other contractors and ongoing projects is now a matter for the Massachusetts District Court. That's where AMD has accused four former employees, who now work at NVIDIA, of illegally taking 100,000 classified documents with them.
Internet sources speak of eight Jaguar cores with 1.6GHz for the Urbis – sorry, Durango – as well as for the Orbis, while other sources had claimed four Steamroller cores with 3.2 GHz clock speed for the PS4. Both are assumed to have a Radeon 8000-like GPU with 800 MHz, with 18 (Orbis, 1.84 Tflops) and 12 compute units (Durango, 1.23 Tflops) respectively. Accordingly, the Durango would be a bit weaker on the GPU side, but it's supposed to come with additional acceleration hardware for audio and video encoding and decoding as well as special "Data Move Engines".
As for memory, the Orbis is believed to be equipped with 4GB of fast DDR5 and the Durango with slower DDR3 memory, but with 8GB. The latter is also supposed to feature embedded SRAM with 32 MB of capacity for fast access times, which, in contrast to the EDRAM of the current Xbox 360, is linked to both the GPU and the CPU.
For AMD's Jaguar as direct successor of the Atom competitor Bobcat this is an important new market – after all, AMD had to say goodbye to the now non-existent netbook market. In principle, Jaguar is based on the same out-of-order architecture as Bobcat, but it has more cores and its instruction set has been significantly extended (SSE4.1, SSE4.2, AVX, FMA, Popcount, CRC32 ...).
SDP: Seriously Dubious Power
AVX for Intel's Atom is nowhere to be seen, that's Ivy Bridge territory. And it is with the latter that Intel is now trying to push into the energy-sensitive domains of the Atoms and Jaguars. At CES, it presented the especially energy-saving Y versions with only 7W. But what kind of 7W was PC boss Kirk Skaugen referring to? No, not the thermal design power (TDP), which until now had been what Intel usually indicated and which is meant for the dimensioning of cooling and energy supply, but the so-called SDP: Scenario Design Power.
Similar to the ACP (average CPU power) formerly introduced by AMD, the SDP is supposed to characterise one application or another (touch applications, apparently) – there's no according white paper yet. Well, bad luck if you try to simply compare this to TDP values of other processors, and even worse if, as in my case, the Linpack benchmark is a typical application. By now, Intel's database ark.intel.com also offers SDP specifications for other processors, but the entries still seem a little rough around the edges. The energy consumption of a Core 2 Duo E4300 drops from 61W TDP to 12W SDP while the consumption of the Atom Z500 jumps from 0.65W TDP to 0.96W SDP. And, if you trust ARK, numerous other processors even are unbeatable in terms of efficiency, like the Core 2 Duo T2300 with a mere 0W SDP.
Intel also has a plan for new application areas for silicon chips: individually engraved wafers as noble gifts for special occasions. At least the astrophysicist Stephen Hawking received a 300mm wafer in 32nm technology with "Happy Birthday Stephen Hawking" engraved a 100 times in its top copper layer for his 70th birthday – only about a year too late, Hawking has meanwhile turned 71. The gift was made within the scope of a ceremony at the Centre for Theoretical Cosmology (CTC) in Cambridge. Furthermore, Intel proudly points out that the cosmology centre founded by Hawking is home to a new supercomputer with 1856 Intel Xeon E5 cores and 31 Xeon Phi co-processors: COSMOS Mk IX, a SGI UV2000. Its 75 Tflops didn't suffice to elevate it into the Top500 list of supercomputers but, in contrast to ordinary clusters, it can use a single system Image, and its 14.5 terabytes of main memory represent the largest shared memory within the European supercomputing scene.
Elsewhere in Europe, however, SGI has lost supercomputer clients again, as for instance with the North-German Supercomputing Alliance in Berlin and Hanover. Shortly before Christmas, it was announced that, for the next generation, a switch to Cray Cascades with "Next Generation Xeon E5" – in other words, with Ivy Bridge EP – had been decided. The latter is supposed to make its debut under the official name Xeon E5-2600 v2 with 10 or even 12 cores in the third quarter of 2013, and so also the assembly of the HLRN-III is planned to begin in autumn. In the final configuration, about a year later – maybe the Haswell EP (Xeon E5 2600 v3) with an initial 14 cores in the R3 socket is already accounted for here – the Alliance's computers are supposed to achieve 2.6 Pflops of peak performance.