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15 August 2008, 17:00

IDF: Details about QuickPath Interconnect

Intel has long been advertising the upcoming QuickPath Interconnect (QPI) which will initially replace the ageing front side bus as a chip-to-chip connection for the communication between processors and the mainboard's chipset in high end desktop computers and servers. So far, a White Paper (PDF file) only reveals that every QPI link can handle up to 6.4 billion transfers per second and that QPI connections are designed to provide up to 25 Gbytes/s. Like AMD with its HyperTransport, Intel is probably adding up the data transfer rates in both transfer directions, so the White Paper approximately confirms the QPI's basic specifications announced about a year ago.

At the IDF in San Francisco next week, Intel plans to serve up some more information about the QPI; the main topics will be some technical aspects and the role of the new interface in future products. Also on the agenda are the RAS features designed to improve reliability, availability and serviceability. QPI will be used in Intel's future Tukwila Itanium quad core which, like its predecessors, is specifically designed for large enterprise servers and mainframes requiring a particularly high degree of reliability, as well as for machines with a high degree of redundancy and therefore high availability and a high fault tolerance.

For more on the 2008 IDF, see also:

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